tomasulo

A simulation of the Tomasulo algorithm, a hardware algorithm for out-of-order scheduling and execution of computer instructions, written in C++.

A simple tomasulo simulator written in Rust for the course Computer Architecture.

Full superscalar RV32I out-of-order processor with Tomasulos Algorithm, 7-stage pipeline, and UVM testbench. 1st Place + Special Jury Award — SanDisk Hardware Hackathon.

Project developed for Computer Architecture course

Algorithm to simulate tomasulo algorithm. The algorithm shows step by step output.

An out-of-order execution CPU simulator for CS2410 Computer Architecture course final project at the University of Pittsburgh.

Simulation of the Tomasulo architecture and algorithm for microprocessors

Introduction in Dynamic Instruction Scheduling (Advanced Computer Architecture) implementing Tomasulo's Algorithm

An Out-of-Order Processor in VHDL based on the Speculative Tomasulo algorithm. Computer Architecture coursework @ Technical University of Crete. Teammate: Anastasios Kampylafkas, github.com/Gabilons

A superscalar out-of‐order architectural simulator (With Memory Hierarchy).

Continuation of a functional Tomasulo out-of-order processor, with a cache prefetcher and replacement policy. Implements most of the RV32I ISA.

Computer Architecture, Jul-Nov 2021

Tomasulo algorithm, Python Implementation

Tomasulo algorithm's simulator

A 5-stage CPU pipeline simulator based on the well-known Tomasulo algorithm.

Simple Tomasulo based processor back-end using VHDL. HRY415-project-3

🔬 toy RISCV CPU based on Tomasulo Algorithm

A superscalar processor in Python

Tomasulo algorithm visualizer

TOMASULO processor in VHDL implementation