A repository for some modules I made while learning Verilog
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Updated
Apr 21, 2021 - Verilog
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dlatch
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Learned as a part of CS210 course
digital vhdl ssd bcd fulladder mux system-programming xor dff halfadder demux clockdivider cs210 xnor dlatch adder-subtractor digitalsystemdesign digitalsystems codeconvertor
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Updated
Dec 18, 2022 - VHDL
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